1. Technical Field
The present invention concerns a flat panel display apparatus, and more particularly a flat panel display apparatus with an automatic coarse control.
2. Related Art
The flat panel display apparatus receives an analog video signal and synchronous signal from a host such as personal computer system to convert the analog video signal by an analog to digital converter (A/D converter) to corresponding digital video signal to display. In this case, the sampling clock signal supplied to the A/D converter varies in its frequency depending on the characteristics of the synchronous signal. Such frequency determination is generally made in compliance with the standard of VESA (Video Electronics Standards Association). VESA is an organization of video companies intended to establish a set of timing standards. Meanwhile, the flat panel display apparatus is usually provided with a coarse control to control the frequency of the sampling clock signal supplied to the A/D converter.
Computer systems are information handling systems that are utilized by many individuals and businesses today. A computer system can be defined as a microcomputer that includes a central processing unit (CPU), a volatile memory, a non-volatile memory such as read only memory (ROM), a display monitor, a keyboard, a mouse or other input device such as a trackball, a floppy diskette drive, a compact disc-read only memory (CD-ROM) drive, a modem, a hard disk storage device, and a printer. A computer system""s main board, which is a printed circuit board known as a motherboard, is used to electrically connect these components together. A computer system can be a desktop computer, a portable computer such as a notebook computer or palm-sized computer, or other type of computer. The central processing unit is often described as a microprocessor. The microprocessor is an electronic component having internal logic circuitry handling most, if not all, the data processing in the computer system. The internal logic circuitry of microprocessors is typically divided into three functional parts known as the input/output (I/O) unit, the control unit, and the arithmetic-logic unit (ALU). These three functional parts interact together and determine the power and performance of the microprocessor. The combination of the control unit and the arithmetic-logic unit can be referred to as the central processing unit. Also, the combination of the input/output unit, the control unit, and the arithmetic-logic unit can be referred to as the central processing unit. One example of non-volatile memory is read only memory (ROM). Information stored in non-volatile memory can remain unchanged even when there is a power failure. The information stored in non-volatile memory will stay there until it is changed. Read only memory is used to store important information such as instructions for the central processing unit. There are different types of read only memory including electrically-erasable-programmable-read-only-memory (EEPROM) chip and flash-read-only-memory (flash-ROM). The flash-ROM can also be referred to as flash memory. Computer systems include a basic input output system (BIOS) which is an especially important program stored in read only memory. The basic input output system tests a computer every time the computer is powered on. The basic input output system can allocate a computer system""s resources automatically, making adjustments needed to accommodate new hardware. Also, the basic input output system governs how system board components interact. When the computer system is powered on, the basic input output system immediately takes control of the computer system and its components. The first duty of the basic input output system is to perform a series of diagnostic routines called the power on self test (POST) routine, which ensures that every part of the computer system""s hardware is functioning properly.
When a video card mounted in the host (computer system) is not in compliance with the standard of VESA, a micro-controller can not provide a correct frequency divisional value. In this case, a user may perform coarse control by manually operating a coarse control key. Also, if the frequency of the sampling clock signal is not set correctly due to some unknown problems, the coarse control key may be used to perform the coarse control. However, it is very hard for the user to manually perform such coarse control accurately and efficiently.
I have found that manual adjustments to coarse control can be inconvenient and inefficient. Efforts have been made with reference to display devices, coarse control, tracking signals, and synchronizing signals.
Exemplars of recent efforts in the art include U.S. Pat. No. 5,841,481 issued to Yoshikawa, U.S. Pat. No. 5,805,242 issued to Strolle et al., U.S. Pat. No. 5,247,229 issued to Ngo et al., U.S. Pat. No. 5,130,802 issued to Ruprecht et al., U.S. Pat. No. 4,777,452 issued to Hayami et al., U.S. Pat. No. 4,983,924 issued to Hillstrom, U.S. Pat. No. 4,484,110 issued to Achtstaetter, U.S. Pat. No. 5,748,252 issued to Draves, U.S. Pat. No. 5,333,019 issued to Okamoto, U.S. Pat. No. 5,155,417 issued to Tateishi, U.S. Pat. No. 5,021,719 issued to Arai, et. at, U.S. Pat. No. 4,491,925 issued to Richards, U.S. Pat. No. 4,483,599 issued to MacRae, et. al, and U.S. Pat. No. 4,323,924 issued to Flasza.
While these recent efforts provide advantages, I note that they fail to adequately provide a flat panel display apparatus with automatic coarse control.
It is an object of the present invention to provide a flat panel display apparatus with means to automatically perform the coarse control.
According to an embodiment of the present invention, a flat panel display apparatus comprises a sampling clock generator for generating a sampling clock signal with a frequency corresponding to a synchronous signal supplied from a host, a phase detector for detecting the phase difference between the sampling clock signal and the synchronous signal to generate a phase difference data, a comparator for comparing the phase difference data with a delay data corresponding to the synchronous signal to generate a correction signal, a micro-controller for generating the delay data and for increasing or decreasing the frequency divisional value of the sampling clock generator to adjust the frequency of the sampling clock signal in response to the correction signal, and an analog to digital converter for converting an analog video signal into corresponding digital video signal in response to the sampling clock signal. Preferably, the sampling clock generator includes a PLL for adjusting the frequency of the sampling clock signal according to the frequency divisional value from the micro-controller. The phase detector comprises a high frequency clock generator for generating a high frequency clock signal with a higher frequency than that of the sampling clock signal, a counter for counting the high frequency clock signal, a latch for latching the output of the counter, and a flip-flop for enabling or disabling the counter and latch according as the synchronous signal or sampling clock signal is inputted.
Thus, detecting the phase difference between the horizontal synchronous signal and the sampling clock signal according to a high frequency clock signal, the frequency divisional value of the PLL is adjusted to change the frequency of the sampling clock signal, thus making the A/D converter correctly convert the analog video signal to the digital video signal.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides an apparatus, comprising: a video display conveying varying visual information to a user; a first clock unit generating a first clock signal with a first frequency corresponding to a synchronous signal received from a host; a detector unit receiving said first clock signal and said synchronous signal, detecting a phase difference between said first clock signal and said synchronous signal, and outputting phase difference data; a comparator receiving delay data corresponding to said synchronous signal and receiving said phase difference data, comparing said delay data with said phase difference data, and outputting a correction signal; a control unit receiving said correction signal from said comparator, said control unit outputting said delay data to said comparator, said control unit performing one of increasing a frequency divisional value and decreasing said frequency divisional value, said increasing of said frequency divisional value and said decreasing of said frequency divisional value corresponding to an adjustment of said first frequency of said first clock signal in response to said correction signal; and a converter converting an analog video signal received from the host into a corresponding digital video signal in response to said first clock signal, and outputting said digital video signal to said video display, said digital video signal corresponding to the visual information.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides a video display apparatus, comprising: a first clock unit generating a first clock signal with a first frequency corresponding to a synchronous signal received from a host; a detector unit receiving said first clock signal and said synchronous signal, detecting a phase difference between said first clock signal and said synchronous signal, and outputting phase difference data; a comparator receiving delay data corresponding to said synchronous signal and receiving said phase difference data, comparing said delay data with said phase difference data, and outputting a correction signal; a control unit receiving said correction signal from said comparator, said control unit outputting said delay data to said comparator, said control unit performing one of increasing a frequency divisional value and decreasing said frequency divisional value, said increasing of said frequency divisional value and said decreasing of said frequency divisional value corresponding to an adjustment of said first frequency of said first clock signal in response to said correction signal; and a multifunction unit receiving a first video signal from the host and said first clock signal from said clock unit, said multifunction unit converting said first video signal into a second video signal in accordance with said first clock signal, said second video signal corresponding to varying visual information conveyed to a user.
To achieve these and other objects in accordance with the principles of the present invention, as embodied and broadly described, the present invention provides a video display apparatus, comprising: a first clock unit generating a first clock signal with a first frequency corresponding to a synchronous signal received from a host; a detector unit receiving said first clock signal and said synchronous signal, detecting a phase difference between said first clock signal and said synchronous signal, and outputting phase difference data; a comparator receiving delay data corresponding to said synchronous signal and receiving said phase difference data, comparing said delay data with said phase difference data, and outputting a correction signal; a control unit receiving said correction signal from said comparator, said control unit outputting said delay data to said comparator, said control unit performing one of increasing a frequency divisional value and decreasing said frequency divisional value, said increasing of said frequency divisional value and said decreasing of said frequency divisional value corresponding to an adjustment of said first frequency of said first clock signal in response to said correction signal; and a multifunction unit receiving an analog video signal from the host and receiving said first clock signal, said multifunction unit converting said analog video signal into a digital video signal in accordance with said first clock signal, said digital video signal corresponding to varying visual information, said multifunction unit conveying the varying visual information to a user.
The present invention is more specifically described in the following paragraphs by reference to the drawings attached only by way of example. Other advantages and features will become apparent from the following description and from the claims.